Introduction

HDLBits — Verilog Practice

HDLBits is a collection of small circuit design exercises for practicing digital hardware design using Verilog Hardware Description Language (HDL). Earlier problems follow a tutorial style, while later problems will increasingly challenge your circuit design skills.

Each problem requires you to design a small circuit in Verilog. HDLBits gives you immediate feedback on the circuit module you submit. Your circuit is checked for correctness by simulating with a set of test vectors and comparing it to our reference solution.

How to use HDLBits

  1. Choose a problem: Browse the problem set or go to the first problem
  2. Write a solution in Verilog
  3. Submit, simulate, and debug if necessary

If you want to track your progress or move to another browser, create a username and password so you can log in from elsewhere.

Which exercises should I do?

The exercises are organized by topic and by approximately difficulty within each topic. Start first with the "Getting Started" section to get familiar with how to use HDLBits. Then start with the easier problems of each topic, and not in a strict top-to-bottom order. The "Verilog Language" section focuses more on using the Verilog syntax and language features, while the "Circuits" section focuses more on using Verilog to create circuits, so problems from these two categories should be done concurrently (practicing new language features while the circuits you create become more complex).

Topics

Getting Started

Using HDLBits

Verilog Language

Problems that focus on introducing Verilog language syntax and features.

Combinational Logic

Logic gates, modules, vectors, combinational always blocks, k-maps, ...

Sequential Logic

Flip-flops, counters, shift registers, finite-state machines

Reading Simulations

Finding bugs, creating circuits from waveforms.

Writing Testbenches

Writing non-synthesizable Verilog testbenches

Run a Simulation

You can run Verilog simulations using our web interface for Icarus Verilog. This is useful for creating shareable simulations of short bits of Verilog.


HDLBits — Verilog 练习

HDLBits 是一系列小型电路问题的集合,通过使用 Verilog 这一硬件描述语言,来练习数字电路设计。在 HDLBits 中,一部分问题采用教程的模式,剩余问题的难度会不断增大,来逐渐挑战提高你的电路设计技巧。

在每个问题中,需要你使用 Verilog 来设计一个小型的电路。在你提交电路设计后,HDLBits 仿真环境将向你的电路输入一系列测试向量,并将输出同参考答案比较来验证电路功能正确,即时反馈电路的运行结果。

如何使用 HDLBits

  1. 选择一个问题
  2. 编写 Verilog 代码
  3. 提交、仿真并在需要时 debug

我该如何进行练习

所有练习划分为多个主题,每个主题难度大致相当。初学者可以从 “Getting Started” 章节开始,熟悉 HDLBits 的使用。接下来分别学习每个主题中靠前的问题,而无需按照从前至后的顺序依次完成每个主题中的练习。“Verilog Language” 主题注重语法以及语言特性。“Circuit” 主题则更关注使用 Verilog 来设计具体电路,所以这两个章节可以并行完成。(学习更多的语言特性,以应对更复杂的电路)

主题

Getting Started

学习使用 HDLBits

Verilog Language

注重介绍 Verilog 语法以及特性

Combinational Logic

逻辑门,模块,向量,组合逻辑块...

Sequential Logic

触发器,计数器,移位寄存器以及有限状态机

Reading Simulations

找出 bug,根据波形设计代码

Writing Testbenches

撰写不可综合的 Verilog testbench

运行仿真

可以通过 HDLBits 网站提供的 Icarus Verilog 仿真接口来运行仿真。这对于创造可分享的 Verilog 仿真很有帮助。

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